In Reply to: Re: The jitter is only a problem? posted by Ted Smith on August 25, 2006 at 17:58:46:
Impedance matching of data lines between IC's cleans up standing waves and reduces yitter (timing errors). A 70% match of impedance of the data lines will make a significant improvement. Installing 30-50 ohm chip R's at the data output pins of the "sending" IC's makes a very large difference in yitter & therefore sonics. Also, be aware that you are listeing to your power supply, making it absolutely critical to performabce (sonics). If you have enough real estate in your CDP's enclosure separate PS's for DAC & crystal are also very noticeable. Damping the crystal with several layers of lead tape (available @ golf shops for increasing 'swing weight" of clubs) works well. Installing 300-400 uF Panasonic HFC's at the power input pins of all IC's will help prevent sags in the input voltage. ALL IC's and the Xtl case should be grounded directly to the pcb's top ground plane. I do this by scratchinng off the pcb's conformal coating at each IC's gd. pin, apply solder to the cleaned pcb area, tin the IC's Gd. pin, and solder an "L" shaped jumper from Gd. pin to PCB Gd. plane. All 'lytics should be bypassed with a 'snubber' consisting of a 0.01 uF stacked film cap in series with about a 6-8 ohm CARBON COMP R from the cap's 'hot' lead ro Gd on the bottom of the PCB to prevent the 'lytics from reaching their resonant frequency and thus electrically dropping out of the circuit.That should get you started.
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Follow Ups
- Re: The jitter is only a problem? - pkell44 12:38:55 08/26/06 (0)