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Upsamplers, DACs, jitter, shakes and analogue withdrawals, this is it.

Well spotted!

*** Note in particular that your diagram is correct in that the input to the DAC isn't the clean clock: it's been polluted by the dirty clock and data coming into the reclocking circuit. ***

Well done!

Arguably even the "clean clock" lines are polluted by ground bounce and power rail fluctuations. Maybe "cleaner clock" is a better term :-)

I quite like the diagram and yes it's a good way of synchronizing clock between transport and DAC using dual SPDIF in/out lines. Didn't Sony do something similar a while ago (also using SPDIF)?


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  • Well spotted! - Christine Tham 16:36:13 03/04/07 (0)


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