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I drew up a simple gain stage in LTspice - here:
(Yes I know there are lots of other ways to design a gain stage ... I used this one as it comes from a phono stage - which obviously has a much higher gain!)Anyway, when a low input signal is used (see the relative values of R3 and R15) ... there is a relatively low THD - see here (0.6%):
... whereas, with a much higher input signal level (R3 = 5k and R15 = 45k) ... the THD becomes unacceptably high! (6%!):
My question is: why should a higher input signal entering the gain stage cause there to be a much higher level of THD? Given the higher input signal is only 450mV ptp and the gain is 4x ... we are nowhere near clipping.TIA for any suggestions.
Edits: 08/19/24 08/19/24Follow Ups:
I drew up a simple gain stage in LTspice - here:
... and wondered why, with high input signal levels, I was getting very high THD in LTspice.It would seem that the culprit causing the high THD levels is the use of 2SK369s in the above circuit - this causes the Source voltage to be down at 120mV, if I set R4 so that 6ma passes through each jfet.
With a 250mV peak input signal ... I need to have the 'volume pot' (R3/R15) set so that it passes a signal level which is, say, 50mV peak at max .
An improvement (in the simulation, at least) is to replace the 2SK369s with 2SK170s. These have lower gain - so R1 has to be increased to get the same output signal level - but the Source voltage for the same 6ma current through each jfet, becomes 460mV ... producing a significantly lower THD level.
So thanks for your help.
Edits: 09/05/24
Considerable noise and distortion the listener hears is produced by things that are not in the audio system. If you could magically eliminate ALL noise and distortion produced by (1) room acoustic anomalies, (2) electronics, (3) cabling and (4) house AC you'd find a lot of noise and distortion is still audible.
How is that possible? Because our hearing mental processes are influenced by what's in the room. We call that extended mind hypothesis. That's what all the talk about removing phones and unused HiFi equipment from the room is all about. I did not create reality.
Relative harmonic levels increase with increasing input, your two cases are 9x different (IIUC, input divider 5k/50k vs 45k/50k), which is a 19dB difference. If things were relatively linear the output signal would also increase by 19dB, the second harmonic would increase by 2*19dB and the third by 3*19dB. So the relative change in second harmonic would be 19dB closer to the fundamental and third 38dB closer to the fundamental. Looking at your normalized component tables that is pretty much what is happening: second has gone from 0.0064% to 0.06% (9.4x = 19.4dB) and third has gone from 0.000058% to 0.004995% (96x = 38dB).
Yes, you did recall correctly - the two sets of R3/R15 values are supposed to represent a volume pot towards the low end then towards the high end of its range.
My question is, in essence, why should the THD increase when the signal level increases ... given we're not in clipping territory?
If you model a non-linear transfer function as power series there will be term for the fundamental that varies as K1*Vin (K1 is the gain), the second harmonic varies as K2^2*Vin, the third harmonic varies as K3^3*Vin. This is why the harmonics go up more quickly than the fundamental. If you plot these terms in dB (log axes) they have straight lines: the fundamental with a slope of 1dB out for 1dB in, second harmonic with a slope of 2dB out for 1dB in etc. Radio engineers use a metric called 'Intercept point' that is an extrapolation of those lines to a point where they meet. This is not physically possible to have any harmonic have the same level as the fundamental but it is a useful concept to predict the amount of any harmonic at lower voltage levels using just the intecept number.
I have some examples of intercept point applied to commercial audio power amps, PM if you'd like a copy.
It is difficult to 'see' distortion in the picture of a sine wave so if the waveform looks distorted to the naked eye it will be very distorted.
but surely the current flowing through the jfets (ie. from Drain through Source to Ground) can be calculated from V=IR ... where:
* V = 120mV, and
* R = 10ohms
... ie. 6ma per jfet?
I don't know LTSpice but circuit simulators usually allow you to plot the current into the pins of components (you might have to explicitly save those pins before you run the simulation). Failing that, plotting the voltage across R4 and dividing by 10 gives you the total FET current.
From your answer to Tomservo, the plot you show looks nicely sinusoidal so there is no obvious clipping or large asymmetry. If that plot is the voltage across R1 you have a signal swing of ~ 200mVpp but your input source is 500mVpp so there is attenuation not gain.
As you can see from the circuit again:
... the circuit voltage at the Drains is 12.199v - so with an output sine wave of 200mV pp we are nowhere near clipping territory!
And yes, the input source is 500mVpp so there is attenuation in the complete circuit - not gain.
The actual gain stage has a gain of about 4x - IOW, the 50mV pp in (coming from the R3/R15 attenuator) becomes 200mV after going through the jfets.
Hi
A guess would be the gate voltage gets too large given where the bend in the curve is for the gate voltage vs current curve.
https://www.mouser.com/datasheet/2/408/6937-30733.pdf
Q1 a current source would not be effected by this, Q8 a follower would simply pass the signal.
I assume your spice has a scope probe, see if the asymmetry is large enough to see on the hot side of R1 and R4 that might give a clue as to which half of the wave is the issue.
Hope that helps
Tom
I'm afraid I'm not 100% sure what you meant by " I assume your spice has a scope probe, see if the asymmetry is large enough to see on the hot side of R1 and R4 " - but if I get spice to give me the waveform at the join between R1 and R4 ... I get this:
Which seems alright?
Hi
The 13th is right, it's too small to see without nulling some of the sine.
The reason was perhaps one could identify which direction the non-linearity was in (the upward signal or downward signal voltage) / operation above and below static (0 signal) bias point.
I am not clear on something though, when you change the resistors, are you also changing the input signal to maintain a fixed "voltage out"?.
These resistors are there to simulate the effect of having a volume pot ahead of the gain stage - so I can both attenuate the original 500mV pp signal ... and increase it.
Hi
My thought was that assuming one kept the output Voltage the same as you changed the input divider ratio, that one would see the distortion is constant with output level- or -it changes according to the input divider even when the output voltage is held constant.
The emitter follower output run class A should not add much distortion, the current source likewise but they ARE part of the circuit and can't be ruled out when tracking something down.
Better question might be what do you want to build?
This circuit seems like a design for very low level signals?
Tom
Very good Qu, Tom.
And you are absolutely right ... the circuit was designed for very low signals (it comes from a phono stage).
I was curious to know whether, by adding a volume pot on the input ... it would be suitable for a preamp.
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