In Reply to: Re: If he used an A64 with Nuendo, do we even know? posted by racerguy on September 5, 2005 at 14:47:18:
"The AMD/Intel 32/64 chips can do up to four single-precision floating point operations per CPU cycle. SSE2 can support packed double-precision FLOPs, but the software/OS has to support it."Irrelevant.
"The "real" 64-bit processors have had native double-precision since their beginning."
Your definition is silly and arbitrary and the CPUs you listed don't even fit it. SPARC, which you listed as "real", like x86 did not originally have an integrated FPU.
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Follow Ups
- Re: If he used an A64 with Nuendo, do we even know? - Max 15:10:12 09/05/05 (4)
- Re: If he used an A64 with Nuendo, do we even know? - racerguy 15:36:45 09/05/05 (3)
- Re: If he used an A64 with Nuendo, do we even know? - Max 16:59:24 09/05/05 (2)
- Let's quit now - racerguy 17:04:21 09/05/05 (1)
- Executive summary: you're wrong - Max 21:45:33 09/05/05 (0)