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Tweakers' Asylum Tweaks for systems, rooms and Do It Yourself (DIY) help. FAQ. |
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Tweakers' Asylum Tweaks for systems, rooms and Do It Yourself (DIY) help. FAQ. |
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In Reply to: Re: $0.26 well spent on my transport posted by pete fleming on July 12, 2000 at 16:10:30:
By email:
"Hi
In my modification, I replaced a HCU04 with
a F04, which essentially decreased the rise/fall time
of the clock uses by the rest of the system. But
from your reply, it seemed that you believed the
opposite, i.e. longer the rise/fall time of the clk,
better the sonic performance. How come?
--
EdT"No that's not what I was suggesting.
From my understanding, there will 2 things that will affect the accuracy of the clock with respect to jitter. The first is the phase of the clock, the other is the precise voltage at which the DAC switches.
Starting with the latter. Assuming an infinitely fast rise time, it can be seen that irrespective of what voltage the device switches at, there will be no variation in the time domain. ie if it switches at 3V, 4V, etc. (an exageration of course) it makes no difference, they all occur at the same time. Now as we know that's not possible, but it serves the example.
Simlarly, if the device switched at PRECISELY the same voltage each time, there would also be no timing errors. However again in pracice there will be a range of voltages at which the device will switch (a pretty small range, but it's there).
As the rise time decreases, the duration at which the clock waveform is in the "grey area" between the 2 switching voltage extremes increases, and the longer the rise time, the greater the variation in the time domain (ie jitter). Therefore increasing rise time will reduce jitter, but not without associated circuit related problems.
Now back to the first problem, that of varying phase. What I AM suggesting is that increasing the rise time will not affect the phase errors occurring at the output of the clock. This can be seen on a diagram, but a bit difficult to post here, I'm sure Steve can help :) If you draw a series of waveforms with the same phase errors but different risetimes, you can see that at the same switching point the phase error is consistent.
Hence I suggest that there are 2 problems here, yet people seem to be concerned only with one (with the exception of Jon, who suggests the sandbag tweak). I'm not sure which is more important, but can imaging improving the fundamental performance of the clock itself would provide similar levels of improvement to that of increasing waveform rise time.
Cheers,
Pete
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Follow Ups
- Re: $0.26 well spent on my transport - Pete Fleming 17:47:54 07/12/00 (0)
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